Salary not disclosed
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Role overview
Job description
Design Engineer or Design Leader for SoC Timing Design (STA, SDC, Synthesis). Timing design (static timing analysis, timing constraint analysis, logic synthesis technology development, product application).
Static timing analysis: Timing design using commercially available STA tools.
Timing constraint analysis: Validation of timing constraints using commercially available STA tools and in-house developed tools.
Logic synthesis: Logic synthesis using commercially available logic synthesis tools.
★In all cases of static timing analysis, timing constraint analysis, and logic synthesis, they collaborate with overseas offices.
Job Satisfaction
In Physical Design roles, managers are deeply involved in the actual design process, driving product development and improving the development flow. Working closely with the design team, you will play a crucial role in finalizing LSI product designs.
They utilize the cutting-edge 3nm process node for automotive applications, and they pride themselves on offering top-level challenges and rewards in digital backend design. Furthermore, their collaboration with overseas EDA vendors and design centers allows you to participate in their work as part of a global organization.
Desired Candidate Profile
Those who have the attitude to face difficulties head-on.
People with strong leadership skills.
Someone who can see the big picture.
Those with strong solution proposal skills.
Those who are comfortable using English in their work.
Qualifications
【MUST】
Over 5 years of experience in digital LSI design (including over 3 years of experience in timing design (static timing analysis, timing constraint analysis)).
Either English or Japanese at a business level (the other at a conversational level).
【WANT】
Understanding hardware description languages (e.g., Verilog-HDL)
Experience using English in a professional setting
Management experience
Those interested in management in the future
Additional Information
*Details regarding the scope of changes to the work location and the scope of duties to be performed will be provided during the selection process.
About this listing
- Source: Hop's official careers site · still listed there on 14 Nov 2026
- Posted 29 Jul 2026
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What they are looking for
Skills & requirements
Qualification
Over 5 years of experience in digital LSI design (including over 3 years of experience in timing design (static timing analysis, timing constraint analysis))
Department · Engineering
Hiring company
Hop
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